By Florian Cajori
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Extra resources for A History of Mathematical Notations: Vol. I, Notations in Elementary Mathematics
5 Experimental Results The proposed transconductor has been fabricated using the TSMC 180 nm Deep N-WELL CMOS process. Its operation and linear V-I characteristics have been studied. A micrograph of the linear transconductor is depicted in Fig. 18 and the occupied area is 15:1 10 3 mm2 . 5 mW. 5-V is sufficient for this circuit to operate under 180 nm CMOS process. For the measurement setup, the output signal of the signal generator was passed through a low-pass filter for the spectral purity of the input signal.
As the mechanism shown above, it is demonstrated that the common-mode control circuit can be implemented to achieve excellent stability over the tuning range. Moreover, linearity could be maintained by the robust and stable common-mode control system. The common-mode rejection (CMR) depends on matching. 1 C / between the CMFF path and the signal path, where is the mismatch ratio. 17;18/ is the transconductance of transistors M17 and M18, and go is the output conductance of the transconductor.
Thus, when fixed values of parameters are given, the aspect ratio of the compensated transistor can be found to achieve a highly linear voltage-to-current conversion. However, the main disadvantage of the modified circuit is the reduced transconductance. 3 The Modified Transconductor by Using Weak Inversion Transistors In order to keep the linearity performance with the maintained transconductance, the weak inversion transistors are used to replace the saturated transistors as shown in Fig. 31.
A History of Mathematical Notations: Vol. I, Notations in Elementary Mathematics by Florian Cajori